The XT bus connector in general use for peripheral cards had no spare connectors. Rather than obsolete existing peripheral cards, IBM designed the AT such that older 8 bit cards could be used and added a 36 pin connector (16 pins on each side) in back of the existing 62 pin connector. This connector accommodated the 8 additional data lines; 5 additional IRQ signals (3 signals were used on the motherboard); 3 DMA channels; and four new signal lines. DMA 0 controls were moved to the new connector and a memory refresh signal was put on the rarely used DMA0 Acknowledge signal on the XT bus connector.
The original AT was clocked at 8MHz. The AT bus frequency in more modern machines is usually derived from the CPU clock, and is usually set to 8 or 8.25 MHz. It is sometimes overclocked. It is rumored that overclocking may cause problems with the DMA controller or may cause the card to switch to 8 bit operation.
Maximum transfer rates for the AT Bus are probably around 5 to 6 MegaByte/s.
Return To Index Copyright 1994-2008 by Donald Kenney.