Cache coherency problems can occur if memory/storage is changed without changing cache contents or if cache contents are changed and memory/storage is then used without being updated from cache. That situation is likely in systems that attempt to distribute processing control across the system to enhance performance, and also use caching to improve performance. In practice, cache coherency problems are often associated with Direct Memory Access where memory can be altered by an external controller that has no knowledge of, or communication with, cache.
Various techniques are used to preserve cache coherency. They may be simple -- flush and void cache if I/O is performed. They may be more sophisticated. For example, Bus Snooping monitors bus activities for changes that must be reflected in cache and updates cache if such activities are detected. These techniques either affect performance or add complexity, or both.
In some situations, non-coherent caches are used by design. For example, to avoid long delays reloading web pages when navigating back through previously viewed pages, many internet Web Browsers will arbitrarily present users with a cached version of the previously viewed web page. In order to see any updates, the user may have to explicitly request reload of the page.
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