Double Data Rate (DDR) DRAM: Double Data Rate Dynamic RAM is a technology developed in 1997 that doubles the theoretical clock rate of clocked DRAM such as SDRAM by transferring data on the trailing edge of the clock signal as well as the leading edge. In practice, the transfer rate is more likely to be determined by factors like data retrieval time or recovery time. However, the higher clock rate may speed up memory access a bit even when the data access isn't clock speed limited because of finer granularity. For example a memory that accesses data in 42 nSec would require four 10nSec wait states and return data in 50nSec with non-DDR accessing. With DDR, the memory would require eight 5nSec wait states and return data in 45 nSec. On the other hand, 47 nSec DRAM would require 50nSec with or without DDR.
In short, while DDR may be a godsend to some specialized hardware designers, for most users, it will -- like EDO -- represent a modest performance improvement or no improvement at all. It will probably be worth having, but not worth paying a large premium for.
The first DDR technology to be released will possibly be Enhanced SDRAM (also known as SDRAM II) built by a Ramtron subsidiary called Enhanced. ESDRAM will require chipset support -- which will reportedly be provided by the Apollo VP3 AGP chipset and the Intel 440BX chipset.
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Copyright 1994-2002 by Donald Kenney.