The specific problem being addressed by Future I/O is the potential bottleneck presented by the I/O bus in the PC architecture. (Why it is thought that I/O makes much real difference in view of the more substantial memory bottleneck isn't addressed in any of the material I've read).
Maximum 1999 PCI bus speeds are approaching 500MB/Sec. A technology called PCI-X promises to double this in the near term future. Beyond that, it is generally felt that I/O will have to be done via switchable point to point connections rather than via a bus. Future I/O (and its competitor-NGIO) are specifications for that point to point connection.
The idea seems to be that various devices will route their signals to the equivalent of a cross-point switch that will connect devices to destinations. Each device will use it's own technology - SCSI, Firewire or whatever and will have an adapter at the switch to achieve FIO compatibility. The switch will apparently be able to route simultaneous non-competing connections between devices that don't require common resources. The initial goal is switching of 1GByte/second connections supporting copper wire connections of up to 10 meters and support for other connection technologies and longer wires via external drivers.
The Future I/O Alliance included 60 companies including Adaptec, IBM, HP, Compaq, and 3Com. However NGIO has a heavyweight list of advocates also.
The current schedule calls for the specification to be promulgated in 1999, with demonstration devices in 2000, and actual products in 2001.
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