INTERLEAVE: Memory Interleaving is a technique which can be used to substantially improve memory response time when the address to be accessed is known in advance. Interleaving organizes memory such that alternate references are made in different "banks" and starts accessing of the next memory element while the previous element is being read/written. Interleaving can be done with either DRAM main memory or SRAM cache. It requires that memory be divisible into identical, physically separate, entities at least as wide as the memory accessing. For example 4 - 30 pin SIMMs can be interleaved on an SX or SLC type computer where memory accessing is 16 bits wide, but not on a 32 bit wide DX or DLC. Two way interleaving provides some time saving. Four way interleave, when possible, provides more. Interleaving can be done with any kind of memory provided that sufficient physical entities are present. For example 8 Megabytes implemented as a single 8MB 72 pin SIMM can not be interleaved on a 486DX (only one physical unit). Nor can 8MB implemented as four 2MB 30 pin SIMMs (The units are only 8 bits wide so only one 32 bit unit can be identified). But two 4MB 72 pin SIMMs can be interleaved. Interleave requires looking ahead to the next access, merely alternating accesses does not improve performance. Interleaving is usually set up by negotiation between the BIOS and the chipset based on the memory configuration found in the machine It is rarely explicitly controlled through CMOS setup. The user usually is not told if interleaving of SRAM and/or DRAM is in affect. Differences in interleave strategy can be a major cause of performance variation between different motherboards/chipsets.
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Copyright 1994-2002 by Donald Kenney.