Within limits, the K5 can process four instructions simultaneously in six dedicated pipelines (two integer, one FP, two memory access, one branch). It has a 16Kb internal L1 instruction cache and an 8KB internal data cache. It does not support MMX instructions. Integer performance was quite impressive, floating point performance, less so. The K5 was released in 1Jan96 P-rated as 100MHz. Subsequent releases were at 100MHz actual (133MHz P Rating) and 116.6MHz actual (166MHz P Rating). 75(75), 90(90) and a different 90(P rated 120) MHz versions were also released. All K-5s use a 296 pin "Socket 7" compatible package. Voltage was 3.3 volts. Power unknown.
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