All PCs have a logic clock that drives the main data buses. Bus rates may vary from 4.77MHz in the original IBM PC to 100MHz in the fastest modern PCs. Other signals including clock multiplied CPU clocks, ISA bus clocks, DMA clocks, etc derive their timing from this bus. The bus timing is often set from jumpers or from switches in the chipset. The clocks are reasonably stable except when "spread spectrum" techniques are used to deliberately jitter frequencies by 1% or so to reduce narrowband RF emissions. Unfortunately, there is no provision for accessing the bus signal directly in software, and in most cases there is no way to directly determine the bus clock rate in software. It is usually possible to guess the CPU speed by timing a sequence of instructions and making assumptions about caching and DRAM refreshing, but that is about the best that can be done.
A second clock is an independent 1.19 MHz clock driven from a 14.3178 MHz crystal and used to drive an 8253 Programmable Timer in the original IBM-PC. This signal is available through ports 040-043 on all PCs and most reasonably PC compatible machines. Port 043 is a control port consisting of two bits of channel, two bits of latch-MSB/LSB control, 3 bits of timer mode, and one bit of BCD/binary select. Channel 0 is used as a free running clock used to generate the 18.206Hz signal used to update the MSDOS Clock. This is the signal used for INT 08 and (Apparently) INT 1A function 0 and 1 services. Channel 1 is used in some early PCs to drive DRAM refresh. Channel 2 is used -- if it is used at all -- to generate PC speaker sounds or for program specific uses.
The third clock is present in most AT and later PCs and is the MC146818 or equivalent clock. Ths clock is part of "CMOS memory" and is battery powered. It is used to maintain the date/time of day when the PC is powered off. It is driven from a 32.768KHz clock. The PC INT 70 1.024mSec interrupt is derived from this clock and most INT 1A functions relate to it. The clock is accessible thru Ports 70 and 71. Resetting the clock timing is possible with a little work and will not be noticed until the next reboot when the PC Time of Day will be affected. This is considered to be socially unacceptable in most PC programming circles.
Pentium and later CPUs have Model Specific Registers that allow access to a 64 bit counter that runs at computer clock speed. The Register can be accessed by the RDTSC instruction (0Fh 31h) and RDMSR/WRMSR instructions.
Return To Index Copyright 1994-2002 by Donald Kenney.