As specified for PC100, the SPD PROM contains at least 256 bytes with a provision for additional memory if needed. Only the first 128 bytes are defined. Of those about 40 bytes are mandatory. The 40 required bytes include housekeeping and definitions of number of bytes, timing, response time, row and column layout, etc. Manufacturing data is optional and is said often to be absent, incorrect, or misleading. Some Intel motherboards using early versions of the i820 chipset have difficulty reading SPDs and thus may not boot at times.
JEDEC standards define bytes 126 and 127 as being "Vendor Specific". Intel, however, requires the bytes to be set to specific values in order to determine bus speed compatibility and clock latencies. As a result, modules could conceivably be JEDEC compliant but not usable with Intel motherboards.
It is claimed that some early SPD detecting BIOSes did not read SPDs properly, and/or used inappropriate values to compute timing parameters.
SDRAM SPDs are programmable and rewritable. It is claimed that some suppliers might rewrite the parameters and remark the memory modules to match.
For those willing to deal with a German language site, a Windows based program called CTSPD is available that can print out SDRAM-SPD contents.
Return To Index Copyright 1994-2013 by Donald Kenney.